1. Field of the Invention
Aspects of the present invention relate to a computer system and a power supplying method thereof, and more particularly, to a computer system and a power supplying method thereof in which noise due to a switched power mode is reduced for a user's convenience.
2. Description of the Related Art
Portable computer systems, such as notebook computers, personal digital assistants (PDAs), or the like, have become widely used in recent times. Accordingly, many technical developments have been made in a central processing unit (CPU) of the computer system, and thus the portable computer system can perform various high-level functions.
To make the CPU of the computer system operate normally, power should be properly supplied to the CPU. A power supply of the computer system comprises an adapter and/or a battery as a main power supply. Here, the adapter converts alternative current (AC) power into direct current (DC) power. The power supply of the computer system further comprises a DC/DC converter as an auxiliary power supply for supplying power to various integrated circuits (IC) installed in the computer system.
Meanwhile, a switched-mode power supply (SMPS), such as a synchronous buck converter, is widely used for the CPU of the portable computer system. In particular, the synchronous buck converter for the CPU supplies power at various voltage levels to the CPU according to operating states of the CPU so as to reduce power consumption of the computer system.
FIG. 1 illustrates a schematic configuration of a conventional computer system employing the synchronous buck converter. A computer system 1 comprises a CPU 11 to execute commands for generally controlling the computer system; a plurality of devices 14 such as a keyboard, a mouse, a universal serial bus (USB) unit, a hard disc drive, and the like, which are needed for performing operations of the computer system; and an I/O control hub (ICH) 12 for checking the state of the plurality of devices 14 and generating a signal to determine a voltage level for operating the CPU 11 according to the checked states of the devices 14. Further, the computer system 1 includes a synchronous DC/DC converter 13 for converting a voltage level of input power in order to supply the appropriate amount of power to the CPU 11.
The ICH 12 receives information about the operating states of the devices 14, and transmits a mode signal for determining a power mode corresponding to the received information to the DC/DC converter 13, thereby implementing a plurality of power modes with varying voltage levels according to the operating states of the CPU 11. The ICH 12 of FIG. 1 generates two mode signals, a first mode signal and a second mode signal, to determine a power mode.
The DC/DC converter 13 receives the first mode signal and the second mode signal from the ICH 12, and outputs a voltage level corresponding to the received signals. The DC/DC converter 13 comprises two metal oxide semiconductor field effect transistors (MOSFETs) 13e and 13f; an inductor 13g and a capacitor 13h to store and discharge a current that flows according to operations of the MOSFETs 13e and 13f; an input capacitor 13i to smooth an input voltage VCD; a converter controller 13a for controlling the operations of two MOSFETs 13e and 13f on the basis of the first mode signal and the second mode signal generated by the ICH 12; and resistors 13b and 13d and a capacitor 13c required for further operations.
The converter controller 13a supplies a gate voltage to each gate of the MOSFETs 13e and 13f to alternately turn on and off two MOSFETs 13e and 13f. When the converter controller 13a turns on the MOSFET 13e, the MOSFET 13f is turned off. In this case, current energy is charged in the inductor 13g. On the other hand, when the converter controller 13a turns on the MOSFET 13f, the MOSFET 13e is turned off. In this case, the current energy charged in the inductor 13g is discharged as output power to be supplied to the CPU 11. The converter controller 13a adjusts a duty ratio to turn on/off two MOSFETs 13e and 13f on the basis of the first mode signal and the second mode signal generated from the ICH 12.
Meanwhile, the computer system 1 has five power modes C0, C1, C2, C3 and C4, which differ in voltage levels according to the operating state of the CPU 11. The operating states corresponding to these power modes and related signals are shown in Table 1.
TABLE 1Power modeC3 (deepC4 (deeperC0C1C2sleep mode)sleep mode)CPUProgramShort termStandbyMediumLong termoperatingcodesstandbymodestandbystandbystateexecutionmodemodemodeCPU input1.356 (V)1.193 (V)0.726 (V)voltage(Vcc)First modelowlowlowlowhighsignalSecondhighhighhighlowlowmodesignal
FIGS. 2A-2E illustrate waveforms of various signals according to operations of the conventional computer system 1 based on the five power modes. In FIG. 2C, Vph, which is a voltage representing the operating states of two MOSFETs 13e and 13f, becomes “high” when the MOSFET 13e is turned on, and becomes “low” when the MOSFET 13f is turned on. In other words, the current energy is charged in the inductor 13g when Vph is in a “high” state. On the other hand, the current energy charged in the inductor 13g is discharged as an output voltage Vcc when Vph is in a “low” state. Periods of time D1 and D2 during which Vph maintains the “high” state are varied according to power modes, and are controlled by the converter controller 13a on the basis of the first mode signal and the second mode signal. When Vph maintains the “high” state for a relatively short period of time D1, the output voltage Vcc becomes lower. On the other hand, when Vph maintains the “high” state for a relatively long period of time D2, the output voltage Vcc becomes higher.
Meanwhile, referring to Table 1, a voltage difference between the power mode C0, C1 or C2 and the power mode C3 is 0.163(V), while a voltage difference between the power mode C3 and the power mode C4 is 0.467(V). Therefore, the voltage difference between the power modes C3 and C4 is the largest among the voltage differences between the power modes. Thus, when the power mode is changed from C4 to C3, the computer system 1 performs an operation for boosting up the output voltage Vcc. At this time, a very high current, i.e., a surge current, instantaneously flows in the inductor 13g as shown in FIG. 2E. When the surge current flows, various devices of the computer system 1, such as the capacitor 13h and the inductor 13g, generate loud noises, thereby causing a user some inconvenience.